Microchip Technology Inc. is a leading provider of microcontroller, FPGA/SoC and analog semiconductors, providing reliability, low-power, defence grade security, low-risk product development, lower total system cost and faster time to market for thousands of diverse customer applications worldwide.
WITTENSTEIN high integrity systems are Mi-V Ecosystem Partner of Microchip. We have ported our Safety RTOS on MiV_RV32 soft CPU IP based on RISC-V Core and can be implemented on Microchip FPGA’s.
Microchip’s 32-bit portfolio offer high performance microcontrollers, and all the tools needed to develop your embedded projects. With MPLAB® Harmony software framework, MPLAB Advanced Software Framework (ASF)* and low cost development tools, 32-bit MCUs shorten your time to market and allow your designs to scale. Microchip 32-bit microprocessors deliver high-performance, market-leading low power, and advanced security for cost-sensitive industrial and consumer applications.
WITTENSTEIN high integrity systems are a Premier tier third-party Partner.
Microchip Technology offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. You can now find our Microchip demos here under Microchip.
SAFERTOS Demos
| Device | Family | SAFERTOS Demo Available |
| PIC32 | PIC32 | Request a Demo |
| dsPIC33 | dsPIC DSC | Yes |
| SmartFusion | ARM Cortex-M3 | Yes |
| SmartFusion2 | ARM Cortex-M3 | Yes |
| MiV_RV32 | RiscV32 | Yes |
Mi-V
We have joined the Mi-V RISC-V ecosystem from Microchip. Our demo for the MiV_RV32 on RiscV32 is free to download in our download centre.
Mi-V is a comprehensive suite of tools and design resources that Microchip have developed with numerous third parties to support RISC-V designs. The Mi-V ecosystem aims to increase adoption of the RISC-V Instruction Set Architecture (ISA) and their System on Chip (SoC) FPGA and RISC-V soft CPU portfolio.
RV32
The MIV_RV32 is a processor core designed to implement the RISC-V instruction set for use in Microchip FPGAs. The core includes the industry standard JTAG interface to facilitate debug access. Three optional bus interfaces are available for peripheral and memory accesses: AHB, APB3, and AXI, which can be configured as AXI3 or AXI4. There are three dedicated interrupts as well as six optional external interrupts in the MIV_RV32 processor core.
PIC32
- PIC32MZ EF with up to 2 MB Flash and 512 KB SRAM offers the highest performance and highest integrations of peripherals in PIC series with 252 MHz speed, CAN, Crypto, Ethernet, FPU and HS USB with 12-bit, 18 MSPS, up to 48 channel ADC module. Also AEC-Q100 Grade 1 Qualified
- PIC32MZ DA series offers MPU like performance with ease of design of an MCU for GUI designs with it’s 2 MB Flash and 640 KB of SRAM, available on-chip 32 MB or 128 MB externally addressable DDR2 DRAM, integrated Graphics Controller, Graphics Processor, 200 MHz speed, 12-bit 18 MSPS ADC module with up to 45 analog inputs, CAN and HS USB.
- PIC32MK with up to 1 MB Flash and 256 KB SRAM offers up to 120 MHz of performance with integrated motor control analog peripherals including high-speed, 12-Bit ADC, Op-Amps and Comparators, up to four CAN modules and dual FS USB ports. AEC-Q100 Grade 1 planned.
- PIC32MX series offers a broad range of products with up to 120 MHz of performance, from 16 KB Flash and 4 KB SRAM to 512 KB Flash and 128 KB SRAM, 10-bit ADC, CAN, Ethernet, and FS USB
- PIC32MM with up to 256 KB of Flash and 32 KB SRAM offers lowest power and low voltage sleep mode with RAM retention <500 nA on PIC32 with Core Independent Peripheral Integration.
- PIC32MZ, PIC32MK and PIC32MX are supported by MPLAB Harmony Software Framework. PIC32MM supported by MPLAB Code Configurator (MCC) for easy set-up.
dsPIC33
The dsPIC33 Digital Signal Controllers offer the performance of a DSP with the simplicity of an MCU. The dsPIC DSC core is designed to execute digital filter algorithms and high-speed precision digital control loops, ideal for applications that need to perform under pressure.
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